1 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs wms512k8bv-xxxe december 1999 rev. 3 white electronic designs corp. reserves the right to change products or speci? cations without notice. 512kx8 monolithic sram features access times 15, 17, 20ns revolutionary, center power/ground pinout jedec approved ? 36 lead ceramic soj (package 100) ? 36 lead ceramic flat pack (package 226) evolutionary, corner power/ground pinout jedec approved ? 32 pin ceramic dip (package 300) ? 32 lead ceramic soj (package 101) ? 32 lead ceramic flat pack (package 220) low voltage operation: ? 3.3v 10% power supply bicmos: ? radiation tolerant with epitaxial layer die commercial and industrial temperature ranges ttl compatible inputs and outputs fully static operation: ? no clock or refresh required. three state output revolutionary pinout evolutionary pinout 32 dip 32 csoj (de) 32 flat pack (fe) top view pin description a0-18 address inputs i/o0-7 data input/output cs# chip select oe# output enable we# write enable v cc power supply gnd ground 36 flat pack 36 csoj top view 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 a0 a1 a2 a3 a4 cs# i/o0 i/o1 v cc gnd i/o2 i/o3 we# a5 a6 a7 a8 a9 nc a18 a17 a16 a15 oe# i/o7 i/o6 gnd v cc i/o5 i/o4 a14 a13 a12 a11 a10 nc 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 a18 a16 a14 a12 a7 a6 a5 a4 a3 a2 a1 a0 i/o0 i/o1 i/o2 gnd v cc a15 a17 we# a13 a8 a9 a11 oe# a10 cs# i/o7 i/o6 i/o5 i/o4 i/o3 this product is subject to change without notice.
2 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs wms512k8bv-xxxe december 1999 rev. 3 white electronic designs corp. reserves the right to change products or speci? cations without notice. dc characteristics - cmos compatible v cc = 3.3v, gnd = 0v, -40c t a 85c parameter symbol conditions min max unit input leakage current i li v cc = 5.5, v in = gnd to v cc 10 a output leakage current i lo cs# = v ih , oe# = v ih , v out = gnd to v cc 10 a operating supply current i cc cs# = v ih , oe# = v ih , f = 5mhz, v cc = 5.5 120 ma standby current i sb cs# = v ih , oe# = v ih , f = 5mhz, v cc = 5.5 15 ma output low voltage v ol i ol = 8ma 0.4 v output high voltage v oh i oh = -4.0ma 2.4 v note: dc test conditions: v ih = v cc -0.3v, v il = 0.3v recommended operating conditions parameter symbol min max unit supply voltage v cc 3.0 3.6 v input high voltage v ih 2.2 v cc + 0.3 v input low voltage v il -0.3 +0.8 v operating temperature t a -40 +85 c capacitance t a = +25c parameter symbol conditions max unit input capacitance c in v in = 0 v, f = 1.0 mhz 12 pf output capacitance c out v out = 0 v, f = 1.0 mhz 12 pf this parameter is guaranteed by design but not tested. absolute maximum ratings parameter symbol min max unit operating temperature t a -40 +85 c storage temperature t stg -65 +150 c signal voltage range to gnd v g -0.5 4.6 v junction temperature t j 150 c supply voltage v cc -0.5 4.6 v truth table cs# oe# we# mode data i/o power h x x standby high z standby l l h read data out active l x l write data in active l h h out disable high z acvive
3 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs wms512k8bv-xxxe december 1999 rev. 3 white electronic designs corp. reserves the right to change products or speci? cations without notice. ac characteristics v cc = 3.3v, gnd = 0v, -40c t a < 85c parameter read cycle symbol -15 -17 -20 unit min max min max min max read cycle time t rc 15 17 20 ns address access time t aa 15 17 20 ns output hold from address change t oh 000ns chip select access time t acs 15 17 20 ns output enable to output valid t oe 7 8 10 ns chip select to output in low z t clz 1 222ns output enable to output in low z t olz 1 000ns chip disable to output in high z t chz 1 7 8 10 ns output disable to output in high z t ohz 1 7 8 10 ns 1. this parameter is guaranteed by design but not tested. ac characteristics v cc = 3.3v, gnd = 0v, -40c t a < 85c parameter write cycle symbol -15 -17 -20 unit min max min max min max write cycle time t wc 15 17 20 ns chip select to end of write t cw 10 12 14 ns address valid to end of write t aw 10 12 14 ns data valid to end of write t dw 8 9 10 ns write pulse width t wp 12 14 14 ns address setup time t as 000ns address hold time t ah 000ns output active from end of write t ow 1 233ns write enable to output in high z t whz 1 889ns data hold time t dh 000ns 1. this parameter is guaranteed by design but not tested. ac test circuit ac test conditions current source current source i ol i oh c eff = 50 pf d.u.t. v z 1.5v (bipolar supply) parameter typ unit input pulse levels v il = 0, v ih = 2.5 v input rise and fall 5 ns input and output reference level 1.5 v output timing reference level 1.5 v notes: v z is programmable from -2v to +7v. i ol & i oh programmable from 0 to 16ma. tester impedance z0 = 75 ? . v z is typically the midpoint of v oh and v ol . i ol & i oh are adjusted to simulate a typical resistive load circuit. ate tester includes jig capacitance.
4 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs wms512k8bv-xxxe december 1999 rev. 3 white electronic designs corp. reserves the right to change products or speci? cations without notice. timing waveform - read cycle write cycle - we# controlled write cycle - cs# controlled address data i/o read cycle 1 (cs# = oe# = v il , we# = v ih ) t aa t oh t rc data valid previous data valid address data i/o cs# oe# t rc t aa t acs t clz t chz t oe t olz t ohz high impedance data valid read cycle 2 (we# = v ih ) address data i/o write cycle 1, we# controlled t aw t cw t ah t wp t dw t whz t as t ow t dh t wc data valid cs# we# address data i/o write cycle 2, cs# controlled t aw t as t cw t ah t wp t dh t dw t wc cs# we# data valid
5 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs wms512k8bv-xxxe december 1999 rev. 3 white electronic designs corp. reserves the right to change products or speci? cations without notice. package 100: 36 lead, ceramic soj 1.27 (0.050) typ 23.37 (0.920) 0.25 (0.010) pin 1 identifier 21.6 (0.850) typ 11.23 (0.442) 0.30 (0.012) 4.7 (0.184) max 0.89 (0.035) radius typ 0.2 (0.008) 0.05 (0.002) 9.55 (0.376) 0.25 (0.010) 1.27 (0.050) 0.25 (0.010) all linear dimensions are millimeters and parenthetically in inches package 101: 32 lead, ceramic soj all linear dimensions are millimeters and parenthetically in inches
6 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs wms512k8bv-xxxe december 1999 rev. 3 white electronic designs corp. reserves the right to change products or speci? cations without notice. package 220: 32 lead, ceramic flat pack all linear dimensions are millimeters and parenthetically in inches package 226: 36 lead, ceramic flat pack 23.37 (0.920) 0.25 (0.010) 32.64 (1.285) typ 12.95 (0.510) 0.13 (0.005) 3.8 (0.150) typ 2.72 (0.107) max 0.127 (0.005) 0.05 (0.002) pin 1 identifier 1.27 (0.050) typ 21.59 (0.850) typ 38.1 (1.50) 0.4 (0.015) 12.7 (0.500) 0.5 (0.020) 5.1 (0.200) 0.25 (0.010) 0.43 (0.017) 0.05 (0.002) all linear dimensions are millimeters and parenthetically in inches
7 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs wms512k8bv-xxxe december 1999 rev. 3 white electronic designs corp. reserves the right to change products or speci? cations without notice. package 300: 32 pin, ceramic dip, single cavity side brazed all linear dimensions are millimeters and parenthetically in inches
8 white electronic designs corporation ? (602) 437-1520 ? www.wedc.com white electronic designs wms512k8bv-xxxe december 1999 rev. 3 white electronic designs corp. reserves the right to change products or speci? cations without notice. ordering information lead finish: blank = gold plated leads a = solder dip leads e = epitaxial layer device grade: i = industrial -40c to +85c c = commercial 0c to +70c package: c = 32 pin ceramic .600" dip (package 300) de = 32 lead ceramic soj (package 101) evolutionary dj = 36 lead ceramic soj (package 100) f = 36 lead ceramic flat pack (package 226) fe = 32 lead ceramic flat pack (package 220) access time (ns) low voltage supply 3.3v 10% bicmos organization, 512k x 8 sram monolithic white electronic designs corp. w m s 512k 8 b v - xxx x x e x
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